Peripheral component interconnect (PCI) and the more recent peripheral component interconnect express (PCIe) are standards for incorporating peripheral devices into computing systems. PCI and PCIe define physical and logical interfaces and protocols for communication with PCI and PCIe compatible devices. For example, PCIe may be used in consumer and industrial applications as a motherboard level interconnect, a passive backplane interconnect, and an expansion card interface. Various standards are based on PCI and PCIe, such as PCI eXtensions for instrumentation (PXI) and PCIe eXtensions for instrumentation (PXIe), which adapt PCI and PCIe, respectively, for test and measurement applications. The discussion below focuses on PCIe and PXIe, which provide more capability and flexibility, although PCI and PXI are still in use and may be combined with PCIe/PXIe systems to support legacy applications.
PCIe compatible devices may be configured as peripheral modules and interconnected with one another and/or with a system controller through a network of PCIe switches (switch fabric) in a modular instrumentation framework (chassis). For example, the system controller may be connected to a root complex having PCIe ports, each of which is connected to a peripheral device or a PCIe switch. Each PCIe switch is connected to multiple PCIe slots in the chassis, which are configured to receive the peripheral modules. The instrumentation chassis may also include other types of modules, such as a system module for controlling operations of the other modules, and a timing module for providing timing signals to the other modules. The flexible nature of the switch fabric enables customization of an individual system.
Currently, high-speed digital and radio frequency (RF) signal test applications require higher processing capabilities to catch up with increasing bandwidth requirements of modern high bandwidth communications. In conventional modular instrumentation frameworks, such as PXIe compatible frameworks, more signal processing and data handling responsibilities in a measurement flow are being moved from traditional personal computer (PC)-based processing to hardware-based processing and acceleration, in which dedicated hardware is included in a measurement system for data processing. For example, high performance Graphics Processing Units (GPUs) may be used in PC graphics cards for measurement acceleration.
There are conventional solutions for high-speed interconnects among modules (e.g., particularly peripheral modules) in the PXIe protocol for attempting to accommodate the higher speed, including front panel interconnects, standard backplane PCIe connections, and carrier-to-mezzanine connections, although each of these conventional solutions has drawbacks. For example, although many different types of interconnects between modules may be used as front panel interconnects, front panel space is extremely limited and is typically reserved for important interconnects requiring user interaction, such as clocks, triggers, and the like, that need to be readily accessible. Standard backplane PCle connections provide up to eight lanes of PCIe available on the PXle backplane, which may support up to 8 Gbps per lane (in Gen3). However, the lanes are protocol specific and may not be viable, e.g., when the protocol in use is not PCIe, the lane speed is too low and/or the number of lanes is insufficient. Carrier-to-mezzanine connections, where the carrier is a main board and the mezzanine is a daughter board within the same module. Thus, multiple module-to-module connections with high speed transceivers, for example, cannot be supported, and spacing between modules is fixed by the carrier-to-mezzanine connector, and thus modules with this interconnect must be at fixed locations adjacent to each other. In addition, present carrier-to-mezzanine interconnects often are unable to run at sufficient data rates without modification.
Accordingly, there is a need for easily implemented, high-speed interconnects for enabling high-speed communications among modules and/or external devices in instrumentation chassis. Further, there is a need for the high-speed interconnects to be able to accommodate any type of communication standard (e.g., as opposed to being limited to PCI or PCIe communications).